Add VHDL to functionList.xml and interpret port map as class
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In addition this might be of help to you, it is what I found in the past and worked on:
<!-- ======================================================== [ VHDL ] --> <!-- | | \b(?!(?-i: | a(?:bs|ccess|fter|l(?:ias|l)|nd|r(?:chitecture|ray)|ssert|ttribute) | | b(?:egin|lock|ody|u(?:ffer|s)) | | c(?:ase|o(?:mponent|n(?:figuration|stant))) | | d(?:isconnect|ownto) | | e(?:ls(?:e|if)|n(?:d|tity)|xit) | | f(?:ile|or|unction) | | g(?:ener(?:ate|ic)|roup|uarded) | | i(?:[fs]|mpure|n(?:ertial|out)?) | | l(?:abel|i(?:brary|nkage|teral)|oop) | | m(?:ap|od) | | n(?:and|e(?:w|xt)|o[rt]|ull) | | o(?:[fnr]|pen|thers|ut) | | p(?:ackage|o(?:rt|stponed)|roce(?:dure|ss)|ure) | | r(?:ange|e(?:cord|gister|ject|m|port|turn)|o[lr]) | | s(?:e(?:lect|verity)|hared|ignal|[lr][al]|ubtype) | | t(?:hen|o|ransport|ype) | | u(?:n(?:affected|its|til)|se) | | variable | | w(?:ait|h(?:en|ile)|ith) | | xn?or | ) | \--> <parser displayName="[TODO] VHDL - VHSIC (Very High Speed Integrated Circuit) Hardware Description Language" id ="vhdl_entities" commentExpr="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) (?m-s:-{2}.*$) # Single Line Comment " > <function mainExpr="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) ^ \h* \w+ \s* : \s* (?:entity\s+)? (?:\w+\.)? \w+ (?: \s+ \w+)? \s+ (?:generic|port) \s+ map " > <functionName> <nameExpr expr="\w+" /> </functionName> </function> </parser> <!-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | https://community.notepad-plus-plus.org/topic/11554/function-list-for-vhdl \--> <parser displayName="[TODO] VHDL by Claudia Frank" id ="vhdl_syntax_v1" > <function mainExpr="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) \h* (?: entity | architecture | component | instance \d* \h* : | (?<= name : \h+ ) PROCESS ) \h+ \w* (?= is | \h | \( ) " > <functionName> <nameExpr expr=".+" /> </functionName> </function> </parser> <!-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | https://community.notepad-plus-plus.org/topic/11554/function-list-for-vhdl \--> <parser displayName="[TODO] VHDL by Dirk Hoelscher" id ="vhdl_syntax_v2" > <function mainExpr="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) ^ \h* (?: \w+ \h* : \h*)? (?: \w+ \h+)* (?: COMPONENT | PROCESS | ENTITY | ARCHITECTURE ) \h* [\w(),\x20]* (?! ; ) $ " > <functionName> <nameExpr expr="\w.*" /> </functionName> </function> </parser> -
Thanks for your help. With the FAQ I found that I had some missunderstanding about the <class range>.
I created a regex which does what I want. However if I have more than 5 “function” entries per class it splits the functionlist entries.What runs fine as I want to
rst_controller_inst : rst_controller port map ( reset_in0 => reset_reset_n_ports_inv, clk => clk_clk, reset_out => rst_controller_reset_out_reset );npp function list shows:
\+--- rst_controller_inst : rst_controller --- reset_in0 => reset_reset_n_ports_inv, --- clk => clk_clk, --- reset_out => rst_controller_reset_out_resetWhen I double the entries (having >5 entries) it splits the “class” in 6 entries:
\+--- rst_controller_inst : rst_controller --- reset_in0 => reset_reset_n_ports_inv, \+--- rst_controller_inst : rst_controller --- clk => clk_clk, \+--- rst_controller_inst : rst_controller --- reset_out => rst_controller_reset_out_reset ...Any ideas what´s wrong? Is there a hard coded maximum for “function” entries per class?
I don´t think that it matters but just in case, my mainExpr is:
<classRange mainExpr="(\w+\s*:(?-s:.*))?\s*port\s*(map)?\s*\(+.*?\)+\s*;" > -
Try this one:
<association id="vhdl_portmap" langID="38" /> <parser displayName="VHDL - Port Map" id ="vhdl_portmap" commentExpr="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) (?m-s:-{2}.*$) # Single Line Comment " > <classRange mainExpr ="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) (?m) # ^ and $ match at line-breaks (?'PORTMAP' ^ # header starts at beginning of a line \h*\w+ # ...instance name \s*: # ...separator \s*\w+ # ...definition name \s*port\s+map # ...element keyword ) (?s:.*?) # whatever, (?= # ...up till \s* # ...optional leading white-space of (?: (?&PORTMAP) # ...next header | \Z # ...or end-of-text ) ) " > <className> <nameExpr expr="\w+\s*:\s*\w+" /> </className> <function mainExpr="\w+\s*=>\s*\w+(?=\s*,?)" > <functionName> <funcNameExpr expr=".*"/> </functionName> </function> </classRange> </parser> -
@MAPJe71 Thanks.
I modified it a bit, as I forgot to tell that there can be a “Generic map” before Portmap.
(and I replaced the ‘(?&PORTMAP)’ expression as I do not understand it and was not able to make it run looking for PORTMAP or GENERICMAP)
Now it looks quite good. However it still suffers from not recognizing class and functions when there is a comment (‘–’) at the end of the line (as given at my first post). I tried it as you can see at function mainExpr but this way it does not work.Here is my current code:
<parser displayName="VHDL - Port Map" id ="vhdl_syntax" commentExpr="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) (?-s:-{2}.*$) # Single Line Comment " > <classRange mainExpr ="(?xi) # free-spacing (see `RegEx - Pattern Modifiers`) (?m) # ^ and $ match at line-breaks ^ # header starts at beginning of a line \h*\w+ # ...instance name \s*: # ...separator \s*(component)?\s*\w+ # ...definition name ((?'GENERICMAP' \s*generic\s+map # ...element keyword ) (?s:.*?))? # whatever, (?'PORTMAP' \s*port\s+map # ...element keyword ) (?s:.*?) # whatever, \)\s*; " > <className> <nameExpr expr="\w+\s*:\s*\w+" /> </className> <function mainExpr="(?<=,|\()\s*\w+\s*(=>\s*\w+)?(?=\s*,?)(?m-s:-{2}.*$)?" > <functionName> <funcNameExpr expr=".*"/> </functionName> </function> </classRange> </parser> -
@el-coder-sb Could you provide a sample source file containing the different combinations and it’s expected Function List tree?
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@MAPJe71 Here you are :-) .
There exist positional and non-positional instantiations in VHDL:doing_so_inst1:doing_so generic MAP( CLK_FREQ => 10, SCL_FREQ => 4 ) PORT map( Reset_s => Reset_s, Clk_4MHz => Clk_4MHz, Signal_in => sig_internal, Signal_out => sig_out, Signal_open => open ); doing_so_inst2: doing_so -- this comments this inst PORT map( -- this comments this port map Reset_s =>Reset_s, Clk_4MHz =>Clk_100MHz, Signal_in =>sig_internal, Signal_out =>open, Signal_open =>open -- this comments this port ); doing_so_inst3: doing_so generic map(72, 10) port map(Reset_s, Clk_120MHz, sig_internal, sig_out2, open); doing_so_inst4 : entity work.doing_so port map( Reset_s =>Reset_s, Clk_4MHz =>Clk_100MHz, Signal_in =>sig_internal, Signal_out =>open, Signal_open =>open -- this comments this port );I am thinking of a list like:
\+---doing_so_inst1: doing_so --- CLK_FREQ => 10, --- SCL_FREQ => 4 --- Reset_s => Reset_s, --- Clk_4MHz => Clk_4MHz, --- Signal_in => sig_internal, --- Signal_out => sig_out, --- Signal_open => open \+---doing_so_inst2: doing_so --- Reset_s =>Reset_s, --- Clk_4MHz =>Clk_100MHz, --- Signal_in =>sig_internal, --- Signal_out =>open, --- Signal_open =>open \+---doing_so_inst3: doing_so --- 72 --- 10 --- Reset_s --- Clk_120MHz --- sig_internal --- sig_out2 --- open \+---doing_so_inst4: doing_so --- Reset_s =>Reset_s, --- Clk_4MHz =>Clk_100MHz, --- Signal_in =>sig_internal, --- Signal_out =>open, --- Signal_open =>openAs mentioned before, my last posted regex works quite fine, unless there are inline comments. So in the example I get doing_so_inst1 and doing_so_inst3 as I wish, but doing_so_inst2 is not recognized at all…
doing_so_inst4 is a new way to instantiate a module (which came with a language update of VHDL) which I have not tried yet to recognize. This has no prio, but should not be too hard to detect as well. It´s a “nice to have”. -
@el-coder-sb Try this one:
<parser displayName="VHDL - Port Map" id ="vhdl_syntax" > <classRange mainExpr ="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) (?m) # ^ and $ match at line-breaks (?(DEFINE) # definition of sub-routine(s) (?'COMMENT'\h*-{2}[^\r\n]*(?:\r?\n|\n?\r)) (?'VALID_ID'[A-Za-z]\w+) ) ^\h* (?&VALID_ID) \s* # instantiation identifier : \s* (?:entity\s+(?:(?&VALID_ID)\.)+)? (?&VALID_ID) (?:(?&COMMENT))? # instantiated unit identifier (?'GENERIC_MAP' \s* generic (?:(?&COMMENT))? \s+ map (?:(?&COMMENT))? \s* \( (?:(?&COMMENT))? (?s:.*?) # association list \s* \) (?:(?&COMMENT))? )? (?'PORT_MAP' \s* port (?:(?&COMMENT))? \s+ map (?:(?&COMMENT))? \s* \( (?:(?&COMMENT))? (?s:.*?) # association list \s* \) (?:(?&COMMENT))? ) \s*; " > <className> <nameExpr expr="\w+\s*:\s*(?:entity\s+(?:\w+\s*\.\s*)+)?\w+" /> </className> <function mainExpr="(?:\w+\s*=\x3E\s*)?\w+(?=\s*,|\s*\)|\h*-{2}|\Z)" > <functionName> <funcNameExpr expr=".*" /> </functionName> </function> </classRange> </parser> -
@MAPJe71 Thanks!
That looks good.
It works fine.
However, it detects two class-function in the following lineSignal_open =>open -- this comments this port‘port’ - although it is inside the comment - is detected as a new class-function.
I tried to solve this. The solution should be that the entire comment is consumed. But I was not able to do so without getting into other trouble (especially the doing_so_inst3 one liner makes trouble).
My best try is:<function mainExpr="(?:\w+\s*=\x3E\s*)?\w+(?=\s*,|\s*\)|\s*-{2}|\Z)[^,)\n\r\f\v]*" >This works for the given example above, but will obviously fail when there is a ‘,’ etc. inside the comment.
If anyone has a quick solution/idea I would appreciate.
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@el-coder-sb Please try the following parser.
It should properly list yourdoing_so_inst1,2&4and my additional...1b,1d,1f,2b,2c,4b&4c.
I was not able to get3&1elisted because getting incorrect “function” detections when the formal part of an association element is optional (i.e. the “identifier =>”-part) and it’s not possible to filter out/remove text (i.e. remove the “embedded” comment), resp.<parser displayName="VHDL - Port Map" id ="vhdl_syntax" > <classRange mainExpr ="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) (?m) # ^ and $ match at line-breaks (?(DEFINE) # definition of sub-routine(s) (?'COMMENT'\h*-{2}[^\r\n]*(?:\r?\n|\n?\r)) (?'VALID_ID'[A-Za-z]\w+) ) ^\h* (?&VALID_ID) \s* # instantiation identifier : \s* (?:entity\s+(?:(?&VALID_ID)\.)+)? (?&VALID_ID) (?:(?&COMMENT))? # instantiated unit identifier (?'GENERIC_MAP' # optional, generic map aspect \s* generic (?:(?&COMMENT))? \s+ map (?:(?&COMMENT))? \s* \( (?:(?&COMMENT))? (?s:.*?) # association list \s* \) (?:(?&COMMENT))? )? (?'PORT_MAP' # port map aspect \s* port (?:(?&COMMENT))? \s+ map (?:(?&COMMENT))? \s* \( (?:(?&COMMENT))? (?s:.*?) # association list \s* \) (?:(?&COMMENT))? ) \s*; " > <className> <nameExpr expr="\w+\s*:\s*(?:entity\s+(?:\w+\s*\.\s*)+)?\w+" /> </className> <function mainExpr="(?x) # free-spacing (see `RegEx - Pattern Modifiers`) (?'VALID_ID'[A-Za-z]\w+) # formal part identifier \s*=\x3E\s* # arrow surrounded by optional white-space (?: (?&VALID_ID) # actual part identifier... | all | open | \d+ # ...or value ) (?= # up till.. \s* # ...optional white-space (?: # ...followed by... [,)] # element separator, end-of-list indicator | -{2}[^\r\n]*(?:\r?\n|\n?\r) # or trailing comment ) ) " > <functionName> <funcNameExpr expr=".*" /> </functionName> </function> </classRange> </parser>Some additional test cases:
doing_so_inst_1b:doing_so -- comment generic MAP( -- comment CLK_FREQ => 10, -- comment SCL_FREQ => 4 -- comment ) -- comment PORT map( -- comment Reset_s => Reset_s, -- comment Clk_4MHz => Clk_4MHz, -- comment Signal_in => sig_internal, -- comment Signal_out => sig_out, -- comment Signal_open => open -- comment ); doing_so_inst_1d : doing_so generic MAP ( CLK_FREQ => 10 , SCL_FREQ => 4 ) PORT map ( Reset_s => Reset_s , Clk_4MHz => Clk_4MHz , Signal_in => sig_internal , Signal_out => sig_out , Signal_open => open ) ; doing_so_inst_1e -- comment : -- comment doing_so -- comment generic MAP -- comment ( -- comment CLK_FREQ -- comment => -- comment 10 -- comment , -- comment SCL_FREQ -- comment => -- comment 4 -- comment ) -- comment PORT map -- comment ( -- comment Reset_s -- comment => -- comment Reset_s -- comment , -- comment Clk_4MHz -- comment => -- comment Clk_4MHz -- comment , -- comment Signal_in -- comment => -- comment sig_internal -- comment , -- comment Signal_out -- comment => -- comment sig_out -- comment , -- comment Signal_open -- comment => -- comment open -- comment ) -- comment ; -- comment doing_so_inst_1f : doing_so -- comment generic MAP -- comment ( -- comment CLK_FREQ => 10 -- comment , -- comment SCL_FREQ => 4 -- comment ) -- comment PORT map -- comment ( -- comment Reset_s => Reset_s -- comment , -- comment Clk_4MHz => Clk_4MHz -- comment , -- comment Signal_in => sig_internal -- comment , -- comment Signal_out => sig_out -- comment , -- comment Signal_open => open -- comment ) -- comment ; -- comment doing_so_inst_2b : doing_so -- comment PORT map( -- comment Reset_s => Reset_s, -- comment Clk_4MHz => Clk_100MHz, -- comment Signal_in => sig_internal, -- comment Signal_out => open, -- comment Signal_open => open -- comment ); doing_so_inst_2c : doing_so PORT map ( Reset_s => Reset_s, Clk_4MHz => Clk_100MHz, Signal_in => sig_internal, Signal_out => open, Signal_open => open ); doing_so_inst_4b : entity work.doing_so port map ( -- comment Reset_s => Reset_s, -- comment Clk_4MHz => Clk_100MHz, -- comment Signal_in => sig_internal, -- comment Signal_out => open, -- comment Signal_open => open -- comment ); doing_so_inst_4c : entity work.doing_so port map ( Reset_s => Reset_s, Clk_4MHz => Clk_100MHz, Signal_in => sig_internal, Signal_out => open, Signal_open => open ); -
@MAPJe71 Thanks a lot for your effort!
So I think this topic has come to an (temporary?) end.
With your last solution most of the possibilities are covered.
Everyone who needs 3 & 1e covered can use my last post (at least as good point to start from).If anyone else has any idea how to cover all the possibilities, feel free to post your ideas :-)
